Application Note: Extracting pcores from BEEcube Platform Studio

Application Note: Extracting pcores from BEEcube Platform Studio
Minimum Subscription Required:
Price for Canadian Academics

How to access this item?


Prepared by Chu Pang (undergraduate student), Geng Liu (undergraduate student), and Paul Chow (professor), The Edward S. Rogers Department of Electrical and Computer Engineering, University of Toronto. 

This application note demonstrates how to extract FPGA hardware cores from BEEcube Platform Studio (BPS), a software add-on to the Berkeley Emulated Engine 3 (BEE3) platform.

The BEE3 platform is a multiple-FPGA system that can accommodate large, complex system architectures and designs, either implemented within a single Xilinx Virtex-5 FPGA or split among the four on-board FPGAs. BPS is a Mathworks Simulink blockset that provides automatic and customizable generation of BEE3-specific hardware interfaces in the form of Xilinx FPGA-implementable cores called pcores.

This document is useful to any hardware developer working on the BEE3 platform who wishes to use the cores provided in BPS for his or her own design done outside of the BPS/Simulink flow.

Acknowledging CMC

If your research benefits from products and services provided by CMC Microsystems, please acknowledge this support in any publications about your work. For more information, please visit Acknowledge CMC.