Application Note: Design and Fabrication of a VI-CMOS Image Sensor

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The design of vertically-integrated (VI) CMOS image sensors that are fabricated by flip-chip bonding.

Application Note: Design and Fabrication of a VI-CMOS Image Sensor

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Product Details

Description

Product Description

This application note starts with a motivation for vertical stacking of integrated circuits, focusing on the benefits for electronic image sensors. Next, it considers general principles in the design of vertically-integrated (VI) CMOS image sensors that are fabricated by flip-chip bonding. These sensors are composed of a silicon die with CMOS circuits and a transparent die with photodetectors. As a specific example, the note presents a VI-CMOS image sensor that was designed at the University of Alberta, and fabricated with the help of CMC Microsystems and Micralyne Inc. Finally, recommendations are made for future projects of a similar nature.

 

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Support Information
Product Specialist:
Version:1.0
Status:Released
Introduction Date:August 6, 2010
Last Updated:April 11, 2018
Support Level:Information Only
Delivery Method:CMC Download
Client Access:CMC Download