User Guide: Adding Custom HDL Block into BEEcube Platform Studio (ICI-311)

User Guide: Adding Custom HDL Block into BEEcube Platform Studio (ICI-311)
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This guide describes how to create and integrate a custom hardware description language (HDL) block into the BEEcube Platform Studio (BPS) design framework targeting BEEcube FPGA development platforms. The BEEcube platforms and BPS are supported by CMC Microsystems to help researchers accelerate their research on system level design, verification, and rapid prototyping. The main feature of this platform is that researchers are not required to be expert hardware designers to prototype their applications.

This platform is used for many different applications such as multi-core systems, wireless communications, networking solutions at and over 100 Gbps, High-Definition (HD) video processing, signal intelligence, radar/sonar arrays, bioinformatics, data mining, medical imaging, and more.

This document provides step-by-step instructions to complete these tasks:

  • Develop a moving average filter design in BPS.
  • Replace a block in the design with a custom HDL block.
  • Co-simulate the design with ModelSim.
  • Implement the design and run it on BEEcube platform hardware.

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All CMC Microsystem account holders with a Professor Research Subscription are authorized to access this application note. For more information, contact our Licensing Administrator at or 613-530-4787.

Acknowledging CMC

If your research benefits from products and services provided by CMC Microsystems, please acknowledge this support in any publications about your work. For more information, please visit Acknowledge CMC.