Tutorial Guide: Reference Design Targeting ML605 – High-Level Synthesis Using Vivado HLS (ICI-314)
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This guided tutorial walks you through a complete embedded system design flow. The starting point of the design flow is to use Vivado High-Level Synthesis (HLS) for the validation and synthesis of a DSP algorithm written in C. The resulting RTL IP is then exported to Xilinx Platform Studio (XPS) where it is integrated in a complete Microblaze processor based embedded system. Finally, the hardware is exported to the Software Development Kit (SDK) for software development and verification in the target hardware.
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