Application Note: Creating Multiprocessor System Based on Packet-Switched Network-on-Chip

Prepared by Cristian Grecu, PhD Candidate, Electrical Engineering, University of British Columbia, and Claudia Rusu, TIMA Laboratory, UJF-INPG-CNRS, France.

This application note describes the design of a multiprocessor system-on-chip (SOC) that uses a custom-built packet-switched network-on-chip (NOC) for inter-processor communication (IPC). The system is built on an FPGA using the software tools ISE and EDK from Xilinx Inc., and simulated using ModelSim from Mentor Graphics. This application note provides procedures to configure MicroBlaze soft processors (from Xilinx) and integrate them with custom-designed routers in a single-chip multiprocessor system. It includes with a basic network-on-chip system, and an open router design, intended for you to implement your own router.

The intended users of this application note are researchers that are interested in prototyping multiprocessor SOCs and NOCs.

Items available for download include:

• application note, and
• design file.

All CMC Microsystem account holders with a Prototyping or Designer Subscription are authorized to access this application note. For more information contact Linda Dougherty at licensing@cmc.ca or 613-530-4787.