Design Methodology Kit: ST 28nm CMOS Analog/Digital Design Flow

Design Methodology Kit: ST 28nm CMOS Analog/Digital Design Flow
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This is a complete analog and digital design flow tutorial based on ST Microelectronics 28nm CMOS design kit with Cadence Encounter and Synopsys Design Vision setup files and a sample analog and digital IO pad library. The kit includes:

  • Part I: Analog/ RF flow
    • Installation
    • Converting your existing libraries from CDB to OA
    • Introduction
    • Setup
    • Simulation
    • Monte Carlo Simulation
    • DRC/ LVS
    • Post layout extraction
    • Smart tiling and sealring
  • Part II: PAD and ESD structures
  • Part III: Digital/ Mixed signal flow
    • Introduction to Digital Library
    • Setup file for Synopsys Design Vision
    • Starting Synopsys Design Vision
    • Place & Route using EDI Encounter
    • Place & Route Steps
    • Importing the GDS file
    • Importing the schematic view
    • Manual poly extension
    • Waived errors
    • Antenna problems

Licensing Requirements or Restrictions

You may access this technology if your university site has signed the STMicroelectronics Non Disclosure Agreement. To find out if your university has signed this agreement, see the STMicroelectronics University List. For more information contact our Licensing Administrator at or 613-530-4787.

Acknowledging CMC

If your research benefits from products and services provided by CMC Microsystems, please acknowledge this support in any publications about your work. For more information, please visit Acknowledge CMC.