Application Note: JTAG Hardware Co-simulation on a Xilinx ML605 Development Board
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Description
This application note describes a JTAG Hardware Co-simulation mechanism on a Xilinx ML605 development board which is distributed through CFI’s emSYSCAN project. Through a design example of 2-D discrete wavelet transform (DWT) filter, it demostrates how to set up the JTAG hardware co-simulation mechanism on the Xilinx ML605 development board, download the design example to the board, and run the simulation.
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