Application Note: Low Power Design for Xilinx FPGAs

Application Note: Low Power Design for Xilinx FPGAs
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Description

Prepared by Paul Leons with assistance from Hugh W. Pollitt-Smith, both from CMC Microsystems; and Samar Abdi from Concordia University.

This application note describes different strategies for optimizing power requirements for FPGA design targeting Xilinx FPGAs:

  • Techniques for reducing power requirements.
  • Synthesis and implementation features of Xilinx PlanAhead.
  • Analyzing power consumption using Xilinx XPower Analyzer (XPA).

This application note is targeted to researchers who are interested in low power FPGA design and who have a sound knowledge of Digital Design, Hardware Description language (HDL), and familiarity with Xilinx ISE Design flow.

Licensing Requirements or Restrictions

All CMC Microsystem account holders with a Professor Research Subscription are authorized to access this application note. For more information, contact licensing@cmc.ca or 613-530-4787.

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