Fab: TSMC 0.35 µm CMOS Process Technology

Fab: TSMC 0.35 µm CMOS Process Technology
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This 0.35-micron CMOS technology is available through CMC’s multi-project wafer service, which delivers Taiwan Semiconductor Manufacturing Company (TSMC) nanometer and micron-scale CMOS technologies through partnership with MOSIS.

The 0.35µm CMOS (CMC term is CMOSP35) process is suitable for:  

            •             Analog circuits
            •             RF circuits
            •             Mixed-signal circuits

Process Details:
            •             Electrical Contact Forming Technology: 
                                        o         Polycide
            •             Layers: 
                                        o         4 metal, 2 poly
            •             Supply Voltages:
                                        o         3.3V
            •             Minimum Drawn Gate Length: 
                                        o         0.35μm


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