Technical Report: 28nm UTBB FDSOI Transistor Test Structure Design and Characterization (ICI-333)
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This report describes design and characterization of transistor test structures designed in September-October 2013 in the 11 metal + Alucap version of the 28nm UTBB (Ultra Thin Body and BOX) high K metal gate FDSOI (FullyDepleted SOI) CMOS process from STMicroelectronics. Unlike in any other planar CMOS, SOI, or FinFET process, this technology allows either n- or p-type wells to be placed below the buried oxide (BOX), in a deep nwell. The p- and n-type wells act as a second gate from which the threshold voltage, IDS, gm, fT and fMAX characteristics of p-MOSFETs and n-MOSFETs can be independently controlled.
The main goals of this investigation were to:
- Compare the high frequency performance of 28nm FDSOI MOSFETs with that of 28nm LP CMOS devices
- Understand the unique features of this technology (second gate) and how it can be best used in mmwave, highspeed digital and silicon photonics circuits
The report includes high-frequency transistor layout design guidelines, and device and circuit measurement results.
Licensing Requirements or Restrictions
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